removed allocation from output
This commit is contained in:
parent
910e0ba351
commit
056630cca3
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@ -1,7 +1,3 @@
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use std::cell::RefCell;
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use std::iter::Cloned;
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use std::slice::{Iter, IterMut};
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#[cfg(test)]
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mod tests;
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@ -22,27 +18,6 @@ where
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let frames = channels[0].len();
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target.extend((0 .. frames).flat_map(|f| channels.iter().map(move |ch| ch[f])));
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}
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/*
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pub fn interleave<T>(channel_buffer: &[Vec<T>], cpal_buffer: &mut [T])
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where
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T: std::marker::Copy,
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{
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// TODO avoid this heap allocation
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// But we don't know how many channels we need.
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// Could use arrayvec if we make an upper limit
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let channels: Vec<RefCell<Cloned<Iter<T>>>> = channel_buffer
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.iter()
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.map(|c| RefCell::new(c.iter().cloned()))
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.collect();
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for (c_buff, channel) in cpal_buffer.iter_mut().zip(channels.iter().cycle()) {
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match channel.borrow_mut().next() {
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Some(c) => *c_buff = c,
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None => break,
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}
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}
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}
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*/
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/// Function for deinterleaving because
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/// cpal writes to buffer interleaved
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@ -63,24 +38,4 @@ where
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for &sample in cpal_buffer.iter() {
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asio_channels[ch.next().unwrap()].push(sample);
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}
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}
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/*
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pub fn deinterleave<T>(cpal_buffer: &[T], asio_channels: &mut [Vec<T>])
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where
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T: std::marker::Copy,
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{
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// TODO avoid this heap allocation
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// Possibly use arrayvec and some max channels
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let channels: Vec<RefCell<IterMut<T>>> = asio_channels
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.iter_mut()
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.map(|c| RefCell::new(c.iter_mut()))
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.collect();
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for (c_buff, a_channel) in cpal_buffer.iter().zip(channels.iter().cycle()) {
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match a_channel.borrow_mut().next() {
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Some(c) => *c = *c_buff,
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None => break,
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}
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}
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}
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*/
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}
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@ -31,6 +31,27 @@ pub struct OutputBuffer<'a, T: 'a> {
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buffer: &'a mut [T],
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}
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#[derive(Default)]
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struct I16Buffer{
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cpal: Vec<i16>,
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channel: Vec<Vec<i16>>,
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}
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#[derive(Default)]
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struct U16Buffer{
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cpal: Vec<u16>,
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channel: Vec<Vec<u16>>,
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}
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#[derive(Default)]
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struct F32Buffer{
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cpal: Vec<f32>,
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channel: Vec<Vec<f32>>,
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}
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struct Buffers {
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i16_buff: I16Buffer,
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u16_buff: U16Buffer,
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f32_buff: F32Buffer,
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}
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impl EventLoop {
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pub fn new() -> EventLoop {
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EventLoop {
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@ -64,26 +85,6 @@ impl EventLoop {
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let channel_len = cpal_num_samples
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/ num_channels as usize;
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#[derive(Default)]
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struct I16Buffer{
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cpal: Vec<i16>,
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channel: Vec<Vec<i16>>,
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}
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#[derive(Default)]
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struct U16Buffer{
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cpal: Vec<u16>,
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channel: Vec<Vec<u16>>,
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}
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#[derive(Default)]
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struct F32Buffer{
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cpal: Vec<f32>,
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channel: Vec<Vec<f32>>,
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}
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struct Buffers {
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i16_buff: I16Buffer,
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u16_buff: U16Buffer,
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f32_buff: F32Buffer,
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}
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let mut buffers = match format.data_type{
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SampleFormat::I16 => {
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@ -140,22 +141,6 @@ impl EventLoop {
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$BuffersTypeIdent:ident
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) => {
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// Function for interleaving because
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// cpal writes to buffer interleaved
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/*
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let $BuffersTypeIdent {
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cpal: ref mut buffer,
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channel: ref channels,
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} = *buffers;
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let length = channels[0].len();
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for i in 0..length{
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for channel in channels{
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buffer.push(channel[i]);
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}
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}
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}
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*/
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// For each channel write the cpal data to
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// the asio buffer
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// Also need to check for Endian
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@ -247,6 +232,10 @@ pub fn build_output_stream(
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let stream_type = sys::get_data_type(&device.driver_name).expect("Couldn't load data type");
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match sys::prepare_stream(&device.driver_name) {
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Ok(stream) => {
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let num_channels = format.channels.clone();
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let cpal_num_samples =
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(stream.buffer_size as usize) * num_channels as usize;
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{
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*self.asio_stream.lock().unwrap() = Some(stream);
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}
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@ -255,15 +244,50 @@ pub fn build_output_stream(
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let asio_stream = self.asio_stream.clone();
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let callbacks = self.callbacks.clone();
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let bytes_per_channel = format.data_type.sample_size();
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let num_channels = format.channels.clone();
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// Get stream types
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// Create buffers
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let channel_len = cpal_num_samples
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/ num_channels as usize;
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let mut re_buffers = match format.data_type{
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SampleFormat::I16 => {
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Buffers{
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i16_buff: I16Buffer{
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cpal: vec![0 as i16; cpal_num_samples],
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channel: (0..num_channels)
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.map(|_| Vec::with_capacity(channel_len))
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.collect()},
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u16_buff: U16Buffer::default(),
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f32_buff: F32Buffer::default(),
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}
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}
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SampleFormat::U16 => {
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Buffers{
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i16_buff: I16Buffer::default(),
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u16_buff: U16Buffer{
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cpal: vec![0 as u16; cpal_num_samples],
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channel: (0..num_channels)
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.map(|_| Vec::with_capacity(channel_len))
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.collect()},
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f32_buff: F32Buffer::default(),
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}
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}
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SampleFormat::F32 => {
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Buffers{
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i16_buff: I16Buffer::default(),
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u16_buff: U16Buffer::default(),
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f32_buff: F32Buffer{
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cpal: vec![0 as f32; cpal_num_samples],
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channel: (0..num_channels)
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.map(|_| Vec::with_capacity(channel_len))
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.collect()},
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}
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}
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};
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sys::set_callback(move |index| unsafe {
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if let Some(ref asio_stream) = *asio_stream.lock().unwrap() {
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// Number of samples needed total
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let cpal_num_samples =
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(asio_stream.buffer_size as usize) * num_channels as usize;
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let mut callbacks = callbacks.lock().unwrap();
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// Assuming only one callback, probably needs to change
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@ -274,13 +298,18 @@ pub fn build_output_stream(
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$SampleType:ty,
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$SampleTypeIdent:ident,
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$AsioType:ty,
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$AsioTypeIdent:ident) => {
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$AsioTypeIdent:ident,
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$Buffers:expr,
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$BuffersType:ty,
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$BuffersTypeIdent:ident
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) => {
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let mut my_buffers = $Buffers;
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// Buffer that is filled by cpal.
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let mut cpal_buffer: Vec<$SampleType> = vec![0 as $SampleType; cpal_num_samples];
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//let mut cpal_buffer: Vec<$SampleType> = vec![0 as $SampleType; cpal_num_samples];
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// Call in block because of mut borrow
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{
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let buff = OutputBuffer{
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buffer: &mut cpal_buffer
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buffer: &mut my_buffers.cpal
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};
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callback(
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StreamId(count),
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@ -292,30 +321,19 @@ pub fn build_output_stream(
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}
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);
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}
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// Function for deinterleaving because
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// cpal writes to buffer interleaved
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/*
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fn deinterleave(data_slice: &mut [$SampleType],
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num_channels: usize,
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channels: &mut [Vec<$SampleType>]) {
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for (i, &sample) in data_slice.iter().enumerate() {
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let ch = i % num_channels;
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channels[ch].push(sample);
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}
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}
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*/
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// Deinter all the channels
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let channel_len = cpal_buffer.len()
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/ num_channels as usize;
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let mut deinter_channels: Vec<_> = (0..num_channels)
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.map(|_| vec![0.0 as $SampleType; channel_len])
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.collect();
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au::deinterleave(&cpal_buffer[..], &mut deinter_channels[..]);
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{
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let $BuffersTypeIdent {
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cpal: ref mut c_buffer,
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channel: ref mut channels,
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} = my_buffers;
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au::deinterleave(&c_buffer[..], channels);
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}
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// For each channel write the cpal data to
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// the asio buffer
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// Also need to check for Endian
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for (i, channel) in deinter_channels.into_iter().enumerate(){
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for (i, channel) in my_buffers.channel.iter().enumerate(){
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let buff_ptr = (asio_stream
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.buffer_infos[i]
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.buffers[index as usize] as *mut $AsioType)
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@ -325,7 +343,7 @@ pub fn build_output_stream(
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buff_ptr,
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asio_stream.buffer_size as usize);
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for (asio_s, cpal_s) in asio_buffer.iter_mut()
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.zip(&channel){
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.zip(channel){
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*asio_s = (*cpal_s as i64 *
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::std::$AsioTypeIdent::MAX as i64 /
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::std::$SampleTypeIdent::MAX as i64) as $AsioType;
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@ -338,16 +356,20 @@ pub fn build_output_stream(
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// TODO check for endianess
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match stream_type {
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sys::AsioSampleType::ASIOSTInt32LSB => {
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try_callback!(I16, i16, i16, i32, i32);
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try_callback!(I16, i16, i16, i32, i32,
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&mut re_buffers.i16_buff, I16Buffer, I16Buffer);
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}
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sys::AsioSampleType::ASIOSTInt16LSB => {
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try_callback!(I16, i16, i16, i16, i16);
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try_callback!(I16, i16, i16, i16, i16,
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&mut re_buffers.i16_buff, I16Buffer, I16Buffer);
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}
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sys::AsioSampleType::ASIOSTFloat32LSB => {
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try_callback!(F32, f32, f32, f32, f32);
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try_callback!(F32, f32, f32, f32, f32,
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&mut re_buffers.f32_buff, F32Buffer, F32Buffer);
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}
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sys::AsioSampleType::ASIOSTFloat64LSB => {
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try_callback!(F32, f32, f32, f64, f64);
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try_callback!(F32, f32, f32, f64, f64,
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&mut re_buffers.f32_buff, F32Buffer, F32Buffer);
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}
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_ => println!("unsupported format {:?}", stream_type),
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}
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